CORDIC Based Array Architecture for Affine Transformation of Images

In this paper a multiplierless array architecture of Affine transformation is proposed. The array architecture utilizes CoOrdinate Rotation DIgital Computer (CORDIC) arithmetic unit as the basic Processing Element (PE). To construct the architecture two types of CORDIC units viz. the circular and linear are used. The architecture is flexible and can be configured according to the specification of the user. Due to its multiplierless organization the array architecture is expected to consume less silicon area and power compared to that of the multiplier-based designs

Mathematical modeling to elucidate brain tumor abrogation by immunotherapy with T11 target structure

T11 Target structure (T11TS), a membrane glycoprotein isolated from sheep erythrocytes, reverses the immune suppressed state of brain tumor induced animals by boosting the functional status of the immune cells. This study aims at aiding in the design of more efficacious brain tumor therapies with T11 target structure. We propose a mathematical model for brain tumor (glioma) and the immune system interactions, which aims in designing efficacious brain tumor therapy. The model encompasses considerations of the interactive dynamics of macrophages, cytotoxic T lymphocytes, glioma cells, TGF-$\beta$, IFN-$\gamma$ and the T11TS. The system undergoes sensitivity analysis, that determines which state variables are sensitive to the given parameters and the parameters are estimated from the published data. Computer simulations were used for model verification and validation, which highlight the importance of T11 target structure in brain tumor therapy

A VLSI Array Architecture for Realization of DFT, DHT, DCT and DST

A unified array architecture is described for computation of DFT, DHT, DCT and DST using a modified CORDIC (CoOrdinate Rotation DIgital Computer) arithmetic unit as the basic Processing Element (PE). All these four transforms can be computed by simple rearrangement of input samples. Compared to five other existing architectures, this one has the advantage in speed in terms of latency and throughput. Moreover, the simple local neighborhood interprocessor connections make it convenient for VLSI implementation. The architecture can be extended to compute transformation of longer length by judicially cascading the modules of shorter transformation length which will be suitable for Wafer Scale Integration (WSI). CORDIC is designed using Transmission Gate Logic (TGL) on sea of gates semicustom environment. Simulation results show that this architecture may be a suitable candidate for low power/low voltage applications

New virtually scaling free adaptive CORDIC rotator

In this article we propose a novel CORDIC rotator algorithm that eliminates the problems of scale factor compensation and limited range of convergence associated with the classical CORDIC algorithm. In our scheme, depending on the target angle or the initial coordinate of the vector, a scaling by 1 or 1/?2 is needed that can be realised with minimal hardware. The proposed CORDIC rotator adaptively selects appropriate iteration steps and converges to the final result by executing 50% less number of iterations on an average compared to that required for the classical CORDIC. Unlike classical CORDIC, the final value of the scale factor is completely independent of number of executed iterations. Based on the proposed algorithm, a 16-bit pipelined CORDIC rotator implementation has been described. The silicon area of the fabricated pipelined CORDIC rotator core is 2.73 mm2. This is equivalent to 38 k inverter gates in IHP in-house 0.25 ?m BiCMOS technology. The average dynamic power consumption of the fabricated CORDIC rotator is 17 mW @ 2.5 V supply and 20Msps throughput. Currently, this CORDIC rotator is used as a part of the baseband processor for a project that aims to design a single-chip wireless modem compliant with IEEE 802.11a and Hiperlan/2

A VLSI Array Architecture for Hough Transform

In this article, an asynchronous array architecture for straight line Hough Transform (HT) is proposed using a scaling free modified CORDIC (Co-Ordinate Rotation Digital Computer) unit as a basic Processing Element (PE). It exhibits four-fold angle parallelism by dividing the Hough space into four subspaces to reduce the computation burden to 25 % of the conventional requirements. A distributed accumulator arrangement scheme is adopted to ensure conflict free voting operation. The architecture is then extended to compute circular and elliptic HT given their centers and orientations. Compared to some other existing architectures, this one exhibits higher computation speed

A 16-bit CORDIC rotator for high-performance wireless LAN

In this paper we propose a novel 16-bit low power CORDIC rotator that is used for high-speed wireless LAN. The algorithm converges to the final target angle by adaptively selecting appropriate iteration steps while keeping the scale factor virtually constant. The VLSI architecture of the proposed design eliminates the entire arithmetic hardware in the angle approximation datapath and reduces the number of iterations by 50% on an average. The cell area of the processor is 0.7 mm2 and it dissipates 7 mW power at 20 MHz frequency

Physics Potential of the ICAL detector at the India-based Neutrino Observatory (INO)

The upcoming 50 kt magnetized iron calorimeter (ICAL) detector at the India-based Neutrino Observatory (INO) is designed to study the atmospheric neutrinos and antineutrinos separately over a wide range of energies and path lengths. The primary focus of this experiment is to explore the Earth matter effects by observing the energy and zenith angle dependence of the atmospheric neutrinos in the multi-GeV range. This study will be crucial to address some of the outstanding issues in neutrino oscillation physics, including the fundamental issue of neutrino mass hierarchy. In this document, we present the physics potential of the detector as obtained from realistic detector simulations. We describe the simulation framework, the neutrino interactions in the detector, and the expected response of the detector to particles traversing it. The ICAL detector can determine the energy and direction of the muons to a high precision, and in addition, its sensitivity to multi-GeV hadrons increases its physics reach substantially. Its charge identification capability, and hence its ability to distinguish neutrinos from antineutrinos, makes it an efficient detector for determining the neutrino mass hierarchy. In this report, we outline the analyses carried out for the determination of neutrino mass hierarchy and precision measurements of atmospheric neutrino mixing parameters at ICAL, and give the expected physics reach of the detector with 10 years of runtime. We also explore the potential of ICAL for probing new physics scenarios like CPT violation and the presence of magnetic monopoles.Comment: 139 pages, Physics White Paper of the ICAL (INO) Collaboration, Contents identical with the version published in Pramana - J. Physic

Management of Archives

Archiving of documents is essential for the organization, and the management of these archives is necessary. Management means planning, documentation and preservation and other multifarious activities. Management also aims to overview the problems of the archives. The paper summarizes all these aspects in a condensed manner, and also emphasizes the changing role of archivists in the context